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docs: rebrand MakeMachine to TailoredMachines across roadmap + BOM Adopt TailoredMachines throughout EveryCycle's roadmap (Thread H, funding model, host-platform notes) and BOM header. mm-v1-bom.md filename retained per naming-decision to avoid churning cross-refs. Adds Thread K (batch-1 latency features for pair + interactive audit) and names pair-programming + audit/fuzz sweeps as the first two reference workloads driving A2 QoS classes.
Co-Authored-By
Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Author: Max Johnson <me@maxj.phd> · 2026-07-13 16:19 UTC
Signed with PGP, not checked
Commit: ca1699c5d711d0ad0cc9e97f64789bbfe95245f7
Parent: 41d23d4
2 files changed, +49 insertions, -12 deletions
M docs/roadmap.md +45 -10
@@ -14,17 +14,26 @@
14 14
15 15 EveryCycle is software. The daemon (`everycycled` + clients + libraries + operator tools) is the product, MIT-licensed, distributed via standard distro packaging.
16 16
17 - Make Creative, LLC is a for-profit company with good intentions. It funds the software by designing and selling **MakeMachines** — reference appliances pre-configured with EveryCycle. MakeMachine revenue pays for the open-source work. We sell machines, not compute-as-a-service.
17 + Make Creative, LLC is a for-profit company with good intentions. It funds the software through **TailoredMachines** — a small-batch atelier that cuts heterogeneous-GPU Linux workstations pre-configured with EveryCycle. TailoredMachines revenue pays for the open-source work. We sell machines, not compute-as-a-service.
18 18
19 - MNW is a MakeMachine customer like any other: it buys MakeMachines from the MakeMachine line at fair internal-transfer pricing and runs its own workloads on them. External sales and internal sales are the same business — both fund EveryCycle.
19 + MNW is a TailoredMachines customer like any other: it buys machines from the TailoredMachines line at fair internal-transfer pricing and runs its own workloads on them. External sales and internal sales are the same business — both fund EveryCycle.
20 20
21 - This is a clean separation of concerns: software identity lives in EveryCycle, hardware design and revenue live in the MakeMachine line, and MNW is a customer.
21 + This is a clean separation of concerns: software identity lives in EveryCycle, hardware design and revenue live in TailoredMachines, and MNW is a customer. See `~/Code/tailoredmachines/docs/plan.md` for TailoredMachines' plan and the deeper brand and product docs in `_private/docs/tailoredmachines/`.
22 22
23 23 ## Wedge
24 24
25 25 1. **Heterogeneity is the default.** Cheap, mixed-generation, mixed-vendor silicon serves real workloads when the runtime above the kernels is honest about the hardware. We do not assume a homogeneous fleet.
26 26 2. **Defensive curation.** When vendors abandon old hardware, EveryCycle catches it. We watch for support discontinuation, fork upstreams when they drop too aggressively, and partner with OSS driver and kernel projects (nouveau, NVK, Mesa, RADV) to extend useful life past vendor end-of-life. Old hardware that can still serve at all is a first-class supported tier.
27 27
28 + ## First named workloads
29 +
30 + TailoredMachines has narrowed the appliance line's target to **1–6 programmers per box doing bursty, high-intensity inference** (see `~/Code/tailoredmachines/docs/plan.md`). That narrowing gives EveryCycle two named reference workloads instead of "generic LLM serving":
31 +
32 + - **Interactive pair-programming** (reference: the pair project, `~/Documents/Content/projects/pair/`). Single-user batch-1, latency-first, prefix-cached repo context, spec-decoded token stream. This is EveryCycle Thread A1/A2's exact shape and pair is the first named internal customer against which the batch-1 features are designed.
33 + - **Audit / fuzz sweeps** (reference: the operator's Claude skill library — `code-fuzz`, `test-fuzz`, `doc-fuzz`, `nitpick`, `audit`, `ultra-fuzz`). Non-interactive, long-form, whole-repo scans. Naturally scheduled as background work between interactive turns. This is Thread C's preemption + QoS-classes story with a real workload attached.
34 +
35 + Together these two workloads exercise Thread C's fair-share + preemption path *at small N*, which is exactly the scale a TM House Cut runs at. Design against them explicitly.
36 +
28 37 The work is *curatorial and operational*, not greenfield kernel engineering. We bind to existing kernel collections (ggml-cuda for NVIDIA, ggml-rocm for AMD) vendored in-tree so we can fork when needed. The novel work is the layer above: the supervisor, the planner, the audit, the operator UX, the client API.
29 38
30 39 ## Platform and distribution
@@ -64,9 +73,11 @@
64 73
65 74 The supervisor owns the device fleet on behalf of *concurrent* clients. Single-tenant operation is not a stable resting point — it's a degenerate case of the multi-client design. PipeWire is fundamentally multi-tenant from day one; so is EveryCycle.
66 75
76 + **Design scale: N=1–6 cooperating programmers per box** (the TM House Cut scale). Multi-tenant fair-share, preemption, and QoS classes matter at small N because the reference workloads (interactive pair vs. background audit/fuzz) *routinely coexist on the same box* — a fuzz sweep and a pair session sharing one GPU is the normal case, not an edge case. This is not a datacenter multi-tenant story where N is thousands and tenants are adversarial; it's a small-team story where the classes are cooperating and the QoS gap between "interactive latency-sensitive" and "background throughput-happy" is the load-bearing distinction.
77 +
67 78 Shape: enumerate-and-dispatch (A1, single client) → **two-client arbitration with priority + fair-share** (A2, the load-bearing milestone for the analogy) → crash isolation (per-executor watchdog + structured panic handling) → hot-plug → preemption and QoS classes → multi-box fleet routing.
68 79
69 - Two clients sharing a GPU under daemon-enforced policy is a required A2 demo, not a late-roadmap luxury. L5 (preemptive multi-tenant scheduling) moves into the early path on this thread.
80 + Two clients sharing a GPU under daemon-enforced policy is a required A2 demo, not a late-roadmap luxury. L5 (preemptive multi-tenant scheduling) moves into the early path on this thread. Classifying workloads by QoS class (interactive vs. background, matching the pair vs. audit/fuzz split) lands with or shortly after A2 — earlier than "preemption and QoS classes" appears in the shape above suggests, because TM's House Cut assumes it.
70 81
71 82 ### Thread D — Audit depth
72 83
@@ -78,15 +89,22 @@
78 89
79 90 ### Thread F — BMC and hardware product
80 91
81 - Open. Shape: wrap stock Redfish on whatever BMC is on the MakeMachine board (ASRock Rack AST2600) → flash OpenBMC → bmc-agent emits structured telemetry → scheduler consumes thermal data for placement decisions. This thread runs in parallel with the runtime work; it does not block A1.
92 + Open. Shape: wrap stock Redfish on whatever BMC is on the TailoredMachines Platform board (ASRock Rack AST2600) → flash OpenBMC → bmc-agent emits structured telemetry → scheduler consumes thermal data for placement decisions. This thread runs in parallel with the runtime work; it does not block A1.
82 93
83 94 ### Thread G — Operator UX
84 95
85 96 Open. Shape: audit screen (the brand moment — beautiful, structured, says "this runtime understands your hardware") → live ops dashboard → multi-box view → incident response views. The TUI exists as `everycycle-tui` already; what's missing is the actual screen content.
86 97
87 - ### Thread H — MakeMachine appliance line (the business that funds the software)
98 + ### Thread H — Appliance line (the business that funds the software)
88 99
89 - MakeMachines are how Make Creative pays for EveryCycle's development. The first MakeMachine (BOM at `docs/hardware/mm-v1-bom.md`) is in service as Sando host and EveryCycle dev box; MNW will buy MakeMachines from this line for its own workloads. Subsequent designs span a price ladder for external customers. Each design is a coherent BOM + chassis + thermal model + BMC config + sample software config.
100 + The hardware line is how the operation pays for EveryCycle's development. The first machine (BOM at `docs/hardware/mm-v1-bom.md` — filename retained; not renamed per `_private/docs/tailoredmachines/naming-decision.md`) is in service as Sando host and EveryCycle dev box; MNW buys machines from this line for its own workloads at fair internal-transfer pricing.
101 +
102 + **Note (2026-07-10):** The hardware line was rebranded to **TailoredMachines** and narrowed to a small-batch atelier cutting workstations for **1–6 programmers doing bursty pair-programming and audit/fuzz workloads**. The product architecture is a single Platform SKU (v1: "The House Cut") plus three explicit GPU paths (Alterations / Off-the-Rack / The Collection). See `~/Code/tailoredmachines/docs/plan.md` and the private brand docs at `_private/docs/tailoredmachines/` for the current framing. The tier list below (H1–H4, previously "MakeMachines") is historical — H3 (hobbyist edge) and H4 (rack appliance) fall outside TailoredMachines' scope entirely, and H1/H2 are collapsed into the House Cut framing.
103 +
104 + Thread H's active work now happens against TailoredMachines' plan, not this table. Kept here for continuity with the pre-narrowing roadmap; will be rewritten wholesale when the House Cut ships its first external unit.
105 +
106 + <details>
107 + <summary>Historical H1–H4 tier list (pre-narrowing, pre-rebrand)</summary>
90 108
91 109 | Milestone | Design | Target | Notes |
92 110 |---|---|---|---|
@@ -95,7 +113,9 @@
95 113 | **H3** | Entry-level edge | Hobbyists, classrooms, residencies (~$2K) | Mini-ITX or SFF, single GPU, quiet, low-power. |
96 114 | **H4** | Rack appliance | Datacenter and colo deployments (~$15K+) | 2U or 4U, 4-8 GPU bays, redundant PSU, dual NIC, OpenBMC. |
97 115
98 - Each milestone produces: published BOM, chassis CAD, thermal model, BMC firmware bundle, EveryCycle config tuned for the platform, assembly guide. See the internal hardware-operation notes for the broader operation framing (chassis, residency, supplier relationships).
116 + Each milestone was to produce: published BOM, chassis CAD, thermal model, BMC firmware bundle, EveryCycle config tuned for the platform, assembly guide. Names in this table (e.g. "MakeMachine v1") are the pre-rebrand names and are preserved for continuity; the current name is TailoredMachines.
117 +
118 + </details>
99 119
100 120 ### Thread I — Client API and adoption
101 121
@@ -105,6 +125,21 @@
105 125
106 126 The v1 freeze is a gate, not a date. Until it lands, every client is opting into churn; after it lands, breaking the API requires a major version and a migration story. This commitment is what makes EveryCycle a *platform* rather than a tool.
107 127
128 + ### Thread K — Batch-1 latency features (for pair and interactive audit)
129 +
130 + Interactive workloads (pair-programming, single-turn audit responses) live or die on per-turn latency, not throughput. The features that move that number don't come for free from Threads A/D — they need their own thread because pair's roadmap explicitly depends on them landing on EveryCycle rather than being maintained as a private vLLM config.
131 +
132 + Shape:
133 +
134 + | Milestone | Feature | Why it matters for the named workloads |
135 + |---|---|---|
136 + | **K1** | **Prefix caching** across turns | Repo context isn't re-prefilled every turn. Highest impact-per-hour lever for pair; also helps interactive audit's "here's my repo, look at file X" patterns. Ships alongside B2/B3. |
137 + | **K2** | **Speculative decoding** with per-model draft | 2–3× throughput at batch 1 when the draft is tuned. Requires draft-model registry and coordinated scheduling. Ships alongside A2 (so the second device can host the draft). |
138 + | **K3** | **KV-cache quantization** (Q8 default, mixed-precision recipe per model) | Halves KV pressure with negligible accuracy loss on production benchmarks. Ships wherever the appraisal work first exposes precision knobs to the scheduler. |
139 + | **K4** | **Adaptive reasoning budget** (per-request `effort` knob) | Terse on a rename, deliberate on architecture. Requested by pair Phase 5; needs a scheduler-visible knob so the batcher can plan around variable per-request compute. |
140 +
141 + K1 is the single most impactful feature on this thread and should ship as soon as the request path is stable enough to hang a cache off of. K2–K4 are gated on measurement — apply after the profile (pair e02, EveryCycle's own dogfooding) says they're the next real bottleneck.
142 +
108 143 ### Thread J — Compatibility shims
109 144
110 145 The adoption mechanism. PipeWire displaced PulseAudio and JACK not by asking apps to port, but by shipping `pipewire-pulse` and `pipewire-jack` — drop-in replacements that spoke the existing protocols. Existing apps pointed at the new daemon without modification.
@@ -127,7 +162,7 @@
127 162 - **Cross-vendor layer placement: belongs to A4.** The executor trait is forward-compatible from day one (activation-handoff signatures present even if no impl uses them); the inter-executor protocol gets built when A4 is reached.
128 163 - **Project structure: parallel threads, not numbered phases.** Each thread has its own pace; project state is the snapshot across all threads.
129 164 - **First GPU: Tesla P40.** Walks the defensive-curation talk on day one. Pascal facing imminent CUDA-legacy transition makes this card the canonical example of what EveryCycle exists to support.
130 - - **Host platform: dual-use with the MakeMachine.** See `docs/hardware/mm-v1-bom.md`. Threadripper Pro 7975WX + WRX90D8 + 512 GB ECC + Gen5 NVMe is the substrate; GPUs are fungible.
165 + - **Host platform: dual-use with the TailoredMachines House Cut.** See `docs/hardware/mm-v1-bom.md` (filename retained per naming-decision). Threadripper Pro 7975WX + WRX90D8 + 512 GB ECC + Gen5 NVMe is the substrate; GPUs are fungible.
131 166 - **First model family: Qwen, starting small.** B1 is the smallest Qwen variant that loads; subsequent milestones step up. Choice driven by open weights, broad quant availability, and clean size laddering.
132 167 - **Client API stability is a sacred commitment.** Once Thread I reaches v1 freeze, the client-facing API follows strict semver: minor versions are additive, patch versions are bug-fix-only, major versions require a migration document and a deprecation window of at least one full release cycle on every supported distro. Before v1 freeze, the API is explicitly marked unstable and may break on any release. The freeze is the line that turns EveryCycle from a tool into a platform; everything downstream (compatibility shims, third-party clients, distro defaults) depends on this commitment being honored.
133 168 - **Multi-client is the default, not a feature.** The daemon assumes concurrent clients from A1, even when only one is connected. The internal data model, scheduler, and audit surface are designed around N clients sharing M devices under policy; the N=1 case is just the limit. This is the structural difference between a system service and a runtime library.
@@ -190,4 +225,4 @@
190 225 - Not a web UI. TUI + Prometheus/OTel exporters.
191 226 - Not a model zoo of our own. We serve the open models that exist.
192 227 - Not macOS-native. Linux only; Apple Silicon via Asahi if at all.
193 - - Not a license-paid product. Software is MIT; revenue comes from selling MakeMachine appliances (external and internal-transfer to MNW). Not compute-as-a-service.
228 + - Not a license-paid product. Software is MIT; revenue comes from selling TailoredMachines workstations (external and internal-transfer to MNW). Not compute-as-a-service.
@@ -1,9 +1,11 @@
1 - # MakeMachine Hardware BOM
1 + # Reference Bench BOM (also: TailoredMachines House Cut Platform)
2 2
3 3 Settled 2026-05-23. Top-of-line host platform; GPUs are fungible and live on the EveryCycle GPU thread (see `~/Code/everycycle/docs/roadmap.md`).
4 4
5 5 The substrate is built once and kept stable; GPU experimentation happens above it without revisiting motherboard, CPU, or RAM.
6 6
7 + **This BOM serves two roles.** It is the personal EveryCycle dev box and Sando host, and it is the basis for the **TailoredMachines House Cut** Platform SKU sold to external customers (see `~/Code/tailoredmachines/docs/plan.md` and `_private/docs/tailoredmachines/product-shape.md`). The hardware spec is the same in both roles. Filename retained as `mm-v1-bom.md` per `_private/docs/tailoredmachines/naming-decision.md` — the pre-rebrand name (MakeMachine) is preserved in the path to avoid churning cross-references.
8 +
7 9 ## Component list
8 10
9 11 | Component | Choice | Approx cost | Notes |
@@ -35,7 +37,7 @@
35 37 |---|---|
36 38 | Host platform | ~$10,280 |
37 39 | First GPU (A1) | ~$235 |
38 - | **MakeMachine v0 (assembled, runnable)** | **~$10,515** |
40 + | **Reference Bench v0 / House Cut v0 (assembled, runnable)** | **~$10,515** |
39 41
40 42 Budget originally specced at $14–16K for the previous spec. Net savings: ~$4–5K. The savings are the GPU experimentation budget for advancing the GPU thread through A4–A5 over time.
41 43